PRODUCT & PROCESS

WAFER LEVEL CHIP SCALE PACKAGE

Definition of WLCSP is Package IC, compatible with standard PCB interconnect technology and with a size equal to the chip size, fabricated using wafer-level process. Currently only plating technology is applied.


Features

  1. Support various wafer size: 12-inch(300mm), 8-inch(200mm), 6-inch(150mm)
  2. Structure & Material: Electroplating solder with SnAg 1.8%, SnAu 80%; Polyimide curing at 200°C(low temp) and 375°C(high temp)
  3. Bump Height: Standard bump height between 68 um and 167 um, and could be adjusted as per customer requirement.
  4. Design: Combine with Cu RDL to serve Wafer level CSP application, and Raytek may provide wide UBM size such as 240 um for thin WLCSP package. This is very important for low form factor WLCSP demand for portable devices.
  5. Turnkey Service: Provide WLCSP Turnkey Service, including Bumping, Test, Grinding, Dicing, Tape & Reel.

Applications

  1. Applicable Products: DRAM, Nor Flash, FPGA, Communication Security Chip, Power Transistor, ...




WLCSP Process Flow- Plating



WLCSP Process Flow- Ball Placement