PRODUCT & PROCESS

Copper Pillar Bump

Copper Pillar Bump improves the package capability for flip chip on substrate and flip chip on module since it could reach as small as 40 um fine bump pitch. The lead free solder tip (SnAg1.8%) can meet RoHS and Green Product requirement.


Features

  1. Support various wafer size: 12-inch, 8-inch, 6-inch, 4-inch
  2. Electroplating solder with SnAg 1.8%
  3. 40 um pitch with 25 um bump size CPB is available, up to 15 um bump pitch is feasible.
  4. Pillar height can as high as 75 um on 12/8 inch wafer, 135 um is available on 6/4 inch wafer.
  5. Polyimide curing at 200°C(low temp) and 375°C(high temp) are both applicable for Memory and Logic device.
  6. Asymmetric CPB may provide more flexible design feasibility to enhance electrical and thermal properties.
  7. Provide dummy bump design service, to help the original chips which has only central pads or very few metal pads to make flip chip assembly applicable. The dummy bump (supportive bump) may have the similar bump height even stand on the different plan with the original CPB, and it is beneficial for Memory device such as DRAM to adopt flip chip package.
  8. Provide WLCSP Turnkey Service, including Bumping, Test, Grinding, Dicing, Tape & Reel.


Cu Pillar Bump Process Flow