PRODUCT & PROCESS

Copper Pillar Bump

Copper Pillar Bump improves the package capability for flip chip on substrate and flip chip on module since it could reach as small as 40 um fine bump pitch. The lead free solder tip (SnAg1.8%) can meet RoHS and Green Product requirement.


Features

  1. Support various wafer size: 12-inch(300mm), 6-inch(150mm), 4-inch(100mm)
  2. Structure & Material: Electroplating solder with SnAg 1.8%, SnAu 80%; Polyimide curing at 200°C(low temp) and 375°C(high temp)
  3. Bump Pitch: 40μm Above.
  4. Pillar Height: Pillar height can as high as 75 um on 12 inch wafer, 90 um is available on 6/4 inch wafer.
  5. Design: Asymmetric CPB may provide more flexible design feasibility to enhance electrical and thermal properties.
  6. Dummy bump: Provide dummy bump design service, to help the original chips which has only central pads or very few metal pads to make flip chip assembly applicable. The dummy bump (supportive bump) may have the similar bump height even stand on the different plan with the original CPB, and it is beneficial for Memory device such as DRAM to adopt flip chip package.
  7. Combined Application: The SAW and BAW Filter cavity could be matching and combines the advantages of copper stud bumps to protect the sensitive circuit/devices and their products to achieve smaller space. The optimized features can also greatly enhance the electrical performance and wide application of 5G.
  8. Turnkey Service: Provide WLCSP Turnkey Service, including Bumping, Test, Grinding, Dicing, Tape & Reel.

Applications

  1. Applicable Products: DRAM, Memory controller, FPGA, WiFi, RF Switch, Power Control IC, SAW and BAW Filter, LED...




Cu Pillar Bump Process Flow